TSMC to Start 450mm Production in 2018
TSMC and 450mm Manufacturing: Six Years to Go
[09/05/2012 11:24 PM]
by Anton Shilov
Although Taiwan Semiconductor Manufacturing Co. is showing a lot of interest towards the next-generation tools that will be used to process 450mm wafers and even made a strategic investment into ASML, a provider of lithography tools, it looks like actual production of chips using large wafers is still six years off at TSMC.
TSMC now expects to begin running pilot 450mm lines in 2016 or 2017, said J.K.Wang, TSMC's vice president for operations, at a press event ahead of the Semicon Taiwan trade-show, reports China Economic News Service. TSMC's roadmap for transition to 450mm had been reportedly completed and the company intends to start making commercial chips on 450mm wafers sometimes in 2018. Apparently, the new plan is much more conservative than those outlined by the company's executives in 2010 and 2011.
Last year TSMC said it would build the first pilot production line at its Fab12 phase 6 (with 20nm technology) that processes 450mm wafers in 2013 - 2014 timeframe and would start mass production of semiconductors on 450mm wafers in 2015 - 2016.
It appears that TSMC has delayed its 450mm plans by two years and will now use 450mm wafers in combination with 10nm-class process technology with FinFET transistors. According to Bin Lin, TSMC’s vice president for research and development, TSMC will use the legacy immersion lithography technology on its 10nm and 16nm transistors as extreme ultraviolet (EUV) lithography is still immature. Only production technologies thinner than 10nm will use EUV or multi e-beam lithography technology. By contrast, Intel Corp. wants to deploy both 450mm wafers and EUV at the same time.
The reasons why TSMC pushes back its 450mm fabs are unclear. Intel is constructing a 450mm-ready factory at the moment. It is unknown when ASML plans to make its 450mm lithography equipment ready for production, which means that there may be changes in plans of Intel and Samsung Semiconductor as well.
TSMC to Start 450mm Production in 2018
TSMC and 450mm Manufacturing: Six Years to Go
[09/05/2012 11:24 PM]by Anton Shilov
Although Taiwan Semiconductor Manufacturing Co. is showing a lot of interest towards the next-generation tools that will be used to process 450mm wafers and even made a strategic investment into ASML, a provider of lithography tools, it looks like actual production of chips using large wafers is still six years off at TSMC.
TSMC now expects to begin running pilot 450mm lines in 2016 or 2017, said J.K.Wang, TSMC's vice president for operations, at a press event ahead of the Semicon Taiwan trade-show, reports China Economic News Service. TSMC's roadmap for transition to 450mm had been reportedly completed and the company intends to start making commercial chips on 450mm wafers sometimes in 2018. Apparently, the new plan is much more conservative than those outlined by the company's executives in 2010 and 2011.
Last year TSMC said it would build the first pilot production line at its Fab12 phase 6 (with 20nm technology) that processes 450mm wafers in 2013 - 2014 timeframe and would start mass production of semiconductors on 450mm wafers in 2015 - 2016.
It appears that TSMC has delayed its 450mm plans by two years and will now use 450mm wafers in combination with 10nm-class process technology with FinFET transistors. According to Bin Lin, TSMC’s vice president for research and development, TSMC will use the legacy immersion lithography technology on its 10nm and 16nm transistors as extreme ultraviolet (EUV) lithography is still immature. Only production technologies thinner than 10nm will use EUV or multi e-beam lithography technology. By contrast, Intel Corp. wants to deploy both 450mm wafers and EUV at the same time.
The reasons why TSMC pushes back its 450mm fabs are unclear. Intel is constructing a 450mm-ready factory at the moment. It is unknown when ASML plans to make its 450mm lithography equipment ready for production, which means that there may be changes in plans of Intel and Samsung Semiconductor as well.
台積電：18吋晶圓估2018量產 EUV於10nm導入
2012/09/04 16:59記者 王彤勻 報導
國際半導體展SEMICON即將於明(5日)開跑，並於今日舉辦展前記者會，包括台積電(2330)研發副總林本堅、台積電營運/12吋廠副總王建光(見左圖)均出席，說明未來台積電於先進製程的發展佈局。王建光指出，順利的話，台積電於2018年就能開始量產18吋晶圓，而切入的製程則會是10奈米。
王建光表示，今年可說是推動450mm(即 18吋)晶圓興奮的一年，主要是今年初全球450mm聯盟成立，包括英特爾、三星、台積電、IBM、GlobalFoundries等5大半導體廠商均加入，每家企業並貢獻20位技術專家，到紐約參與450mm晶圓的討論，希望以最經濟、有效的方式來為450mm建立新的標準，對未來規格的制訂盡快形成共識，期待將來450mm一生產「一槍就能中的」。
而關於台積電日前入股ASML，對18吋晶圓的生產推動助益如何？王建光則是指出，希望於2015年初能夠取得EUV(極紫外光微影技術)的Demo Tool，而在2016-2017年漸漸建立起450mm的上下游供應鏈，順利的話，台積電於2018年就能開始量產18吋晶圓，而切入的製程會是10奈米。
而林本堅也進一步解釋，目前台積電規劃中的製程演進，是從28奈米，依序走到20奈米、16奈米、10奈米，現階段20奈米進度順利，已接近量產階段。惟他也坦言，台積電原本預估在20奈米製程就要採用EUV技術，但摩爾定律不斷滾動，因此「等不及」，現在20奈米仍採用雙重曝光技術(Double-patterning)生產，而下一世代的16奈米FinFET製程估計也還會持續採用雙重曝光技術。
林本堅指出，畢竟雙重曝光技術仍相當昂貴，台積電原本期待EUV的選項能給公司「帶來解脫」，但目前技術還不成熟，也因此他認為，EUV技術在10奈米的時候再導入可能性較高，而多重曝光(multiple-patterning)也會是另一個選項。
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