越南物價飆 將續緊縮貨幣 CPI ~ 17.5% April

越南物價飆 將續緊縮貨幣 【經濟日報╱編譯葉亭均／彭博資訊二十四日電】 2011.04.25 08:30 am

越南物價飛漲促使當局不斷調高利率，但最新統計數據顯示通膨仍持續竄升，4月CPI創下2008年來最大漲幅。 (路透社) 儘管越南政府在不到半年內已將主要利率調升近一倍，但通膨竄升仍創下2008年來最快速度，4月消費者物價指數（CPI）增幅直逼18%，增加政府必須再採緊縮政策的壓力。 越南國家統計局24日公布，4月CPI比一年前攀升17.51%，高於上個月的13.89%，為2008年12月以來最高。4月物價較3月上漲3.32%。 越南央行自去年11月以來，已將附買回利率從7%調升至13%，且調降2011年信貸成長率目標，藉以緩和通膨，並使投資人重拾對政府有能力預防經濟過熱的信心。不過標準普爾（S&P）本月表示，在一般家庭支出中，食物和商品開銷仍占大宗，汽油和電力漲價將導致通膨增溫。 越南龍飛資本公司（Dragon Capital）首席投資長斯托普表示：「貨幣和財政緊縮幾乎還沒對通膨產生影響，政府打擊通膨的政策出現落後效應。」Vietnam Property基金公司指出，通膨率可能會先飆高至接近20%，年底再降至13%。 越南央行在4月1日將再融資利率從12%調升至13%，是不到一個月內二度上調借貸成本。當時附買回利率也調升至同樣水準。 瑞信經濟學家薩提拉泰表示，附買回利率是越南政府進行市場公開操作的工具，也是越南主要的政策利率。他預期附買回利率將在年底前升至14%。薩提拉泰指出，進一步調升利率可能會加重民眾債務負擔。目前市場上的貸款利率已經攀升至21%的高點。 薩提拉泰說：「這將抑制越南央行的升息意願，促使他們動用其他工具來緊縮貨幣政策。」他指出，越南通膨率竄升不僅是受全球影響，當地內需強勁、貨幣供給擴張和越南盾匯率疲弱，都是通膨惡化的原因。 【2011/04/25 經濟日報】@ http://udn.com

Personal income in San Diego declines for first time in four decades

Personal income in San Diego declines for first time

http://www.signonsandiego.com/news/2011/apr/21/personal-income-in-san-diego-declines-for-first-ti/

BY LORI WEISBERG

THURSDAY, APRIL 21, 2011 AT 12:11 P.M.

For the first time in four decades,personal income in San Diego County declined, further proof of the deep economic toll the recession took on people's lives.

In a new report released by theBureau of Economic Analysis, totalincome in the county in 2009 was $139.5 billion, a decline of 1.7 percent from 2008, which mirrors the drop in the nation as a whole. The decrease, however, was not as steep as the 2.3 percent drop statewide.

The personal income figure takes into account not only job earnings, but also income from savings, employer-provided health insurance, unemployment benefits and Social Security.

Among large counties, the change in personal income from 2008 to 2009 ranged from an 8.1 percent decline -- in Oakland County, Mich. -- to a 4.2 percent gain in Loudoun County, VA.Growth slowed in all but one of the nation’s 255 large counties.

"I'm not surprised by this," said University of San Diego economist Alan Gin. "It’s all due to the big downturn in the economy. It was so fast and so severe that it would lead to this drop."

He noted that San Diego recorded its largest job loss -- 70,000 -- between 2008 and 2009. By comparison, worst previous decline was in the early 1990s recession when the county saw 14,000 jobs disappear.

Economist David Lenze with the Bureau of Economic Analysis agreed that a combination of high unemployment, a deep recession and a sharp slide in the stock market contributed to the unprecedented decline in personal income.

"Typically, personal income grows from year to year, so a decline is unusual," he said. "And of course, 2009 was a year we were in recession when a large number of people lost their jobs."

Within the state, the county's total personal income ranked third, behind Los Angeles and Orange counties, while its per capita income of $45,706 ranked 13th.

forecast 4月17日春雷起響

17日春雷響 全台有雨偏涼

 更新日期:2011/04/15 09:19

（中央社記者汪淑芬台北15日電）今年都已到了4月中旬，春雨仍不多，缺水危機再現。根據中央氣象局預測，17日春雷可望響起，全台都有雷雨機會，且氣溫會大幅下降。

氣象局說，今天全台可見陽光，白天氣溫偏高，西半部可達攝氏30度，東半部28度；明天白天各地還是很晴朗，氣溫仍偏高，西半部及離島易有局部霧；晚上受鋒面接近影響，北部、東北部地區及馬祖將漸轉為有短暫陣雨天氣。

氣象局預測，17日鋒面報到，全台都可能出現雷雨，且氣溫明顯下降，北部、東北部高溫可能降8度到9度，中部降7度，南部及東部約降4度。

氣象局說，鋒面影響台灣時間約2天，18日氣溫下降會較緩和，但天氣仍偏涼，19日各地氣溫才會逐漸回升，台灣北部、中南部及馬祖、金門、澎湖易有局部霧。1000415

4/15/2011 esp 30'C 北部地區 22~30°C 降雨:0% 中部地區 23~30°C 降雨:0% 南部地區 25~30°C 降雨:0% 東北部地區 22~28°C 降雨:10% 東部地區 23~29°C 降雨:10% 東南部地區 24~30°C 降雨:10% 「最晚春雷」遲不響　破台北61年紀錄 更新日期:2011/04/15 12:59 游皓婷 今年的春雷遲遲不響，已經破了台灣觀測史上「最晚春雷」紀錄，氣象局分析，今年適逢「反聖嬰」的後一年，北方冷空氣太強，鋒面不容易生成，也就不打雷，春雨跟著偏少，不過目前有一道結構完整的鋒面接近台灣，預測星期天全台會下雨，民眾或許有機會，聽到雷聲轟隆作響。 春暖四月天，全台高溫熱過27度，已經像夏天了，春雷卻還沒響，堪稱台灣氣象史上「最晚」春雷。 依照二十四節氣，「驚蟄」這天春雷會響，落點在3月6日左右，氣象局上次測到最晚春雷，是在2004年3月29日，今年又比「原紀錄」晚了半個月，破台北測站61年紀錄，氣象局分析，這跟北方冷空氣太強，有直接關係。 氣象局長期預報課長賈新興：「反聖嬰的後一年，(北方)冷空氣太強了，整個大環境不利鋒面在台灣附近形成，沒有鋒面，相對地來說空氣上升減少(不打雷)。」 根據統計資料，反聖嬰後一年，春雷容易遲到、春雨偏少，目前中部以北的集水區降雨，只有往年的2到3成，水庫蓄水量最多撐到5月底，能不能舒緩，要看週六入夜之後的鋒面有多強，北部跟東北部受鋒面影響會下雨，週日全台灣有雨，北部高溫掉9度，剩下20度，南部高溫26度。 溫差變化大，最快要到下週二，天氣才會慢慢穩定。

岩手縣普代村「0死亡奇蹟」 只因村長堅蓋15公尺防波堤

岩手縣普代村「0死亡奇蹟」　只因村長堅蓋15公尺防波

• 普代村雖遭海嘯襲擊，但在防波堤後的村莊卻完全無損。(圖／擷取自讀賣新聞)

國際中心／綜合報導

日本東北部9.0地震帶來駭人海嘯，將岩手縣的臨海城鎮逐一吞沒，其中普代村雖位於災情最慘重的三陸地區，卻能夠逃過一劫，且至4月3日止都沒有傳出村民傷亡的消息；這個「0死亡奇蹟」不只出於幸運，最重要的原因，還是過去村長堅持要築出一道15公尺高的防坡堤及水門。

據《讀賣新聞》(Yomiuri)報導，普代村當初在規劃防坡堤與水門時，曾受到眾人批評，大家都認為「15公尺太高了」；不過當時的村長和村幸得不肯讓步，稱「明治時期發生過大海嘯」，絕對有建高的必要。於是在1967年，岩手縣投入5800萬日圓建造普代村防坡堤，1984年再花35億圓蓋水門。

據了解，普代村在1896年的明治三陸海嘯、1933年的昭和三陸海嘯中共有439名犧牲者，當時的海嘯就高達15公尺，因此和村村長才會堅持主張，建造一道15公尺高、155公尺長的防波堤。

今年3月11日地震發生後，在普代村經營餐飲生意的太田定治還特地跑到防波堤上，看著巨大海嘯襲來；當海港被吞沒的時候，海水卻在防波堤前面停下來，後方避難的100多名港口工作人員連腳都沒被浸濕。太田說，如果沒有這個防波堤，大家都沒命了。

目前岩手縣失蹤、死亡人數已超過8000人；有「萬里長城」(10公尺高防波堤)守護的宮古市田老地區也有數百人死亡、下落不明。普代村現任村長深渡宏說：「雖然防波堤外6個漁港全數毀損，但先人的防災意識卻拯救了我們的性命，現在正努力進行災後復原的工作。」

原文網址: 岩手縣普代村「0死亡奇蹟」　只因村長堅蓋15公尺防波堤 | 國際新聞 | NOWnews 今日新聞網 http://www.nownews.com/2011/04/04/334-2702170.htm#ixzz1IcT3fR2A

東京大學調查：日本大海嘯高達37.9公尺

• 氣仙沼市港口被海嘯迅速淹沒。(圖／取自YouTube)

更多照片

國際中心／綜合報導 

伴隨東日本大地震而來的海嘯到底有多高，《讀賣新聞》報導，根據東京大學地震研究所的實地調查發現，在岩手縣宮古市的田老地區，海嘯沖抵37.9公尺高山坡上，這是截至目前為止日本海嘯調查的次高紀錄。

報導指出，1896年明治三陸地震時，岩手縣大船渡市觀測到38.2公尺的海嘯紀錄，是日本國內最高紀錄。

東大地震研究所副教授都司嘉宣前往田老地區調查小堀內漁港週邊的漂流物等，結果在距離海岸200公尺的山丘斜面上37.9公尺高處，確認落葉遭海嘯沖走，且數公尺下方也有一輛嚴重毀損的消防車。他表示調查才剛展開，很有可能在更高地點找到海嘯痕跡。

上個月，日本港灣機場技術研究所在東北地區青森、岩手和宮城3縣對港灣設施等進行調查，根據受災建築物的浸水痕跡及居民的證言等，計算出海嘯的浪高在岩手縣大船渡市高達到23.6米；另外，宮城縣女川町達14.8米、岩手縣久慈市13.4米、岩手縣釜石市9.0米、青森縣八戶市8.4米。

原文網址: 東京大學調查：日本大海嘯高達37.9公尺！ | 頭條新聞 | NOWnews 今日新聞網 http://www.nownews.com/2011/04/04/11490-2702125.htm#ixzz1IcTuWHmL

China 2011首季逆差10.2億美元, 繼二○○三、○四年第一季之後,6年見

China posts first quarterly trade deficit in 7 years

by D'Arcy Doran – Sun Apr 10, 3:04 am ET http://news.yahoo.com/s/afp/20110410/ts_afp/chinaeconomyexportssurplus

 

SHANGHAI (AFP) – China said it had posted its first quarterly trade deficit in seven years, despite a narrow surplus in March, as rising commodity prices pushed manufacturers' costs higher.

China recorded a small trade deficit of $1.02 billion for the first quarter, its first since the beginning of 2004. But analysts said a large trade surplus was expected for the full year as its exports tend to grow later in the year.

"China's demand is strong and the prices of bulk commodities are high currently, but the situation won't last as China's exports usually go up in the second half of each year," UBS economist Wang Tao told Dow Jones Newswires.

Exports rose 26.5 percent on year in the first quarter and imports were up 32.6 percent on year.

The quarter's trade deficit was due to the strong rise in imports, the General Administration of Customs said in a statement.

"The value of imports in the first quarter hit a record high for the first time of more than $400 billion," the customs administration said.

For the month of March, China bounced back to a $140 million surplus after posting a $7.3 billion-trade deficit in February -- its first since March 2010.

February's slowdown was typical of China's festive season, when factories ease off -- and in most cases close -- after cranking up production before the Lunar New Year holiday.

March exports rose 35.8 percent from the same month a year earlier, up from February's 2.4 percent rise.

Imports rose 27.3 percent, up from 19.4 percent in February. Rising prices for raw materials helped push up the value of imports.

The March surplus caught analysts by surprise. A Dow Jones poll of 13 economists had forecast a median monthly deficit of $4.0 billion for March.

In 2010, China posted a $7.24 billion deficit in March, as companies stocked up on imported raw materials, many of which were later processed into goods for export. For the full year, China posted a $183.1 billion surplus.

Analysts said the quarterly trade deficit suggested China was making progress in rebalancing its export-reliant economy.

"The rebalancing is happening. It's only a matter of time," BNP Paribas economist Isaac Meng told Dow Jones, adding rising import prices were eroding the surplus while domestic inflation was raising export prices.

Washington, one of the harshest critics of Beijing's trade policy, acknowledged in March that China was taking steps to boost imports.

US Treasury Secretary Timothy Geithner said last month that China had no alternative but to shift its growth strategy towards relying more on domestic growth as demand weakens in the US and Europe -- but added it needed to do more.

China is planning to cut tariffs on imports as it seeks to boost domestic demand, state media has reported.

The state-run China Daily quoted Vice Commerce Minister Zhing Shan last month as saying not only would the government cut tariffs, but it would also relax some restrictions on importers.

China Posts Narrow March Trade Surplus

BEIJING (Dow Jones)--China posted a narrow $140 million trade surplus in March, swinging from a $7.3 billion deficit in February, customs data showed Sunday.

China 2011首季逆差10.2億美元 6年僅見

• 2011-04-11中國時報【李文輝／綜合報導】

    　大陸海關總署十日發布，今年第一季中國外貿進出口總值為八○○三億美元（下同），受大陸經濟保持較快增長、國際市場大宗商品價格大幅上漲、以及春節長假等三大因素影響，今年第一季累計出現一○．二億元的貿易逆差，是六年來首見的季度貿易逆差。
    　海關統計，今年一到三月，進出口總值比去年同期（下同）增長二九．五％；其中出口三九九六．四億元，增長二六．五％；進口四○○六．六億元，增長三二．六％。
    　統計顯示，大陸第一季進口總值首次超過四千億元，創下歷史新高，比去年第四季增加五．一％，造成一○．二億元的貿易逆差，這是繼二○○三、○四年第一季之後，再次出現的季度貿易逆差。去年第一季是貿易順差一三九．一億元。
    　在大陸主要貿易夥伴中，第一季中歐雙邊貿易總值一二三七億元，增長二二％。中美九七六．五億元，增長二五％。中日八○七．八億元，增長二七．一％。東協少於日本十四．四億元位居第四，為七九三．四億元，增長二六．一％。
    　《中新社》報導，國際貨幣基金組織量化解讀中國經濟的全球影響，發現中國經濟每增長一％，三年後就將為全球經濟積累出○．二％的ＧＤＰ增長，五年後則帶動全球經濟增長○．四％。
    　有「中國資本市場中最活躍企業家」之稱的復星集團董事長郭廣昌，九日在美國哈佛大學「中國論壇」指出，中國經濟「發動機」動力來自幾個方面，一是中國製造業仍有很大競爭力，短期內很難被其他國家取代。
    　其次是中國城市化有巨大空間，保證經濟發展基礎；三是中國消費能力也在不斷增長。最重要的是，中國人希望通過自己努力、改變生活狀況的願望，誰也阻止不了。

德儀28奈米OMAP5 聯電 TI 28nm OMAP5 UMC , gate-last

德儀28奈米 聯電中選

• 2011-04-07
• 工商時報
• 【記者涂志豪／台北報導】

    　看好智慧型手機及平板電腦的應用處理器（AP）龐大商機，德州儀器計劃於明年推出28奈米OMAP5處理器，但委外代工的晶圓代工廠名單出現顯著變化。聯電成為德儀OMAP5最主要代工夥伴，至於近年來為德儀生產45奈米OMAP4處理器的三星電子，在28奈米世代接單上恐將出局。
    　德儀2007年決定停止45奈米以下先進製程的獨立開發工程，將營運重心在鎖定在類比IC市場發展，數位邏輯晶片則擴大與晶圓代工廠合作。經過3年餘的調整，德儀的OMAP系列應用處理器、DaVinci系列數位訊號處理器（DSP）、LoCosto及eCosto等手機基頻晶片等委外代工已經有了一定架構。
    　在65奈米及45/40奈米的委外上，德儀DSP晶片主要是與台積電合作，至於OMAP系列已陸續交由聯電、特許（已併入全球晶圓GlobalFoundries）等業者生產，其中聯電接單量最大。而近年來，德儀的OMAP4晶片銷售暢旺，並獲得黑莓機製造廠RIM採用在即將推出的平板電腦PlayBook中，OMAP4主要委由全球晶圓、聯電、三星等以45奈米量產。
    　根據外電引述德儀資深副總裁Kevin Ritchie談話指出，在90奈米世代，聯電是德儀最大代工廠，但到了65奈米世代後，台積電成為最大代工廠。如今，德儀將40奈米的高效能晶片持續交給台積電代工，但45奈米OMAP4則由聯電、全球晶圓、三星等代工。而明年製程推進到28奈米後，聯電可望成為最主要代工廠。
    　據了解，德儀明年將推出28奈米4核心OMAP5晶片，聯電可望成為最主要代工廠，而德儀也將會下單給其它晶圓代工廠，但三星看來已經出局。所以業內預估，擁有28奈米製程技術及產能的台積電及全球晶圓，也有機會接獲訂單。


UMC
 http://www.umc.com/english/process/i.asp

28-nanometer UMC's 28nm process technology is developed for applications that require the highest performance process technology. In October 2008, we were the first foundry to deliver fully functional 28nm SRAM chips, and have proven in silicon the high-K/metal solution that will be implemented on this technology node. UMC's 28nm progress was also recognized by the industry with the foundry being selected to present at the 2009 IEDM on a hybrid high-K/metal gate approach. Currently, we are already working with several customers to adopt their products on UMC's 28nm technology. 28nm Brochure (pdf, 339kb) 28nm Technology for Broad Applications UMC incorporates a dual approach for its 28nm technology to address different market applications. Conventional silicon gate/silicon-oxy-nitride gate oxide technology is used for its LP (low power) process, which is ideal for portable applications such as mobile phone ICs. UMC's second option will utilize a high-k/metal gate stack for speed-intensive products such as graphic, application processor, and high-speed communication ICs. L28 Logic/MS(1) Devices Xilinx FPGAs go down to 28nm Submitted by admin on April 6, 2011 – 9:40 pmNo Comment Xilinx Inc. rolls out the first of its 7 series FPGAs with the shipment of the Kintex-7 K325T FPGA. This rollout marks the industry’s fastest product rollout of next generation PL devices built with 28nm technology, according to the company, which delivered the devices in less than 90 days from tapeout by leveraging TSMC’s 28nm HPL process.The Kintex-7 K325T device is the first FPGA in its class to deliver the highest number of channels per dollar at less than 12W of power for LTE wireless radio cards and next generation wireless base stations. Kintex-7 FPGAs claim to provide the optimized price performance required for FPDs, ultrasound equipment and many other applications and includes high-bandwidth, low jitter serial transceivers to address price sensitive wired communication applications. The FPGA is the first of 28 devices that make up the 7 series FPGA that includes the Artix-7 and Virtex-7 FPGA families. The Kintex-7 K325T FPGA contains the industry’s first 28nm Target Design Platform.Kintex-7 FPGAs are designed to provide price performance at the lowest power to meet requirements for key applications. The Kintex-7 FPGA family leverages the unified architecture shared across the 7 series of 28nm device families so customers can begin FPGA development now for designs that may later migrate to Artix-7 and Virtex-7 FPGAs.The devices are offered in conjunction with the Xilinx ISE Design Suite 13, AMBA 4 Advanced Extensible Interface (AXI) bus protocol-compliant IP, and targeted reference designs. All of these targeted design platform components run on the Kintex-7 FPGA KC705 evaluation board now being demonstrated for customers so that designers can evaluate the power consumption, performance, and capabilities of the new Kintex-7 K325T devices.Xilinx is also introducing the industry’s first 28nm Targeted Design Platform that combines the Kintex-7 K325T FPGA, ISE development tools, AXI 4 compliant IP, and an initial version of the base targeted reference design running on the Kintex-7 FPGA KC705 evaluation board.The 7 series targeted design platform allows customer to evaluate the features available in the Kintex-7 FPGA family including Artix-7 and Virtex-7 FPGAs. Designers and engineers have an easy to use, flexible FPGA platform as an alternative to inflexible and slow-to-develop ASIC or ASSP-based silicon solutions.Kintex-7 K325T FPGA initial samples are shipping now and order entry for the Kintex-7 FPGA base Targeted Design Platform that uses the Kintex-7 FPGA KC705 evaluation board will open in Q4 2011. The Virtex-7 485T FPGA and the 2 million logic cell 2000T will begin initial sampling in August and November of 2011, respectively. Artix-7 FPGA initial samples will ship first quarter of 2012. Xilinx confirms: Samsung, TSMC in, UMC out at 28-nm Dylan McGrath 2/22/2010 5:00 PM EST SAN FRANCISCO—Xilinx Inc. said Monday (Feb. 22) it will use leading foundry Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) as one of two foundry suppliers for its 28-nm FPGAs, a major strategy shift that has been the subject of industry rumors and analyst speculation for weeks. Xilinx (San Jose, Calif.) said it is using TSMC and Samsung Electronics Co. Ltd.'s foundry division to make 28-nm parts, which are expected to begin sampling by the end of this year. Xilinx has long used a two foundry strategy at each process node. Samsung first joined Xilinx' foundry supplier roster at the 40-nm node, supplanting Toshiba. Xilinx' shift to TSMC is a bitter pill for rival foundry United Microelectronics Corp. (UMC), which has been a foundry supplier to Xilinx for more than a decade. Some analysts blamed 65-nm yield issues at UMC for a supply glitch that last summer materially impacted Xilinx sales, speculation which UMC later denied. UMC (Hsinchu, Taiwan) will presumabably continue to manufacture Xilinx parts at 65-nm, 40-nm and other nodes. Suresh Menon, product development vice president for Xilinx' programmable platforms development group, said Xilinx evaluates foundries' process technology at every process node in order to determine which suppliers to use. Suresh Menon Xilinx Inc. "In this generation, as in every generation, we look at the needs for our next generation FPGAs and identify what process we need to deliver that generation of products," Menon said. Xilinx is emphasizing power management in its 28-nm products (see related story). Menon said static power is a very significant portion of the total power dissipation of a chip at 28-nm. The choice of process technology at 28-nm is critical to achieving maximum power efficiency, he added. Menon said TSMC and Samsung offered Xilinx the best process technology options for high-performance, low-power process technology at 28-nm. Xilinx has been working with the two companies on 28-nm development for more than two years, he said. Some analysts, including Ian Ing of Broadpoint Amtech, have been saying for several weeks that Xilinx was expected to use TSMC at the 28-nm node. Altera Corp., the chief competitor to Xilinx in the programmable logic market, has used TSMC as its foundry supplier for years. Menon said the Xilinx-TSMC agreement would not restrict TSMC from working with Xilinx competitors. He noted that this is typical of TSMC's business practices and said TSMC manufacturers parts for competing suppliers in many markets, including graphics chips. Xilinx and Samsung last week announced that Spartan-6 FPGAs have achieved volume production on Samsung's 45-nm process.  http://rram.spaces.eepw.com.cn/articles/article/item/69323 UMC Takes Hybrid Approach to 28 nm High-k 2009-12-15 09:46:01   At IEDM, foundry UMC described a hybrid approach to high-k/metal gate deposition that seeks to take advantage of both the gate-first and gate-last approaches for 28 nm transistors. The hybrid scheme compares with a gate-last method supported by rival Taiwan foundry TSMC, and a gate-first approach by GlobalFoundries for the 28 nm generation.   At the International Electron Devices Meeting (IEDM) in Baltimore, United Microelectronics Corp. (UMC, Hsinchu, Taiwan) described a hybrid approach to high-k/metal gate deposition that seeks to take advantage of both the gate-first and gate-last approaches for 28 nm transistors. The UMC announcement of a hybrid approach for its 28 nm high-performance customers sets up an interesting competition at the 28 nm node, coming to market over the next year. Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC, Hsinchu, Taiwan) will use a gate-last process flow for its high-performance 28 nm customers, while rival GlobalFoundries (Sunnyvale, Calif.) will stick with the gate-first approach developed by the members of the Fishkill Alliance for the 28 nm node, while considering the gate-last and gate-first approaches for the 22 nm generation, a spokesman said. Using a gate-last approach, UMC said the Ion-Ioff performance of the PFET achieved a ~30% enhancement over a gate-first approach. At IEDM, G.H. (Mike) Ma, a researcher at UMC's R&D center in Tainan, Taiwan, said the gate-first approach for PMOS transistors tends to result in a reduction (roll-off) of the flatband voltage as well as threshold voltage (Vt) levels exceeding 0.4 V, which he said are "unacceptable, certainly for high-performance applications." The flatband voltage (Vfb) roll-off is related to the thermal budget of the work-function metal, he said. The gate-last method, first developed by Intel Corp., resolves many of the performance issues, Ma said, but the approach is fairly expensive. The UMC hybrid approach "will not get to the performance level of the pure gate-last method," he said, but it is likely to be less expensive. The hybrid approach integrates "the high compatibility of the gate-first scheme for the NFET and the better thermal budget control of the gate-last scheme for the PFET." By using a gate-last approach for the PMOS transistor, and a gate-first approach for the NMOS transistor, UMC seeks to avoid "the high process complexity" of the pure gate-last approach, which Ma said remains "a challenging process." The hybrid process results in a "very good NMOS" transistor that has little of the mobility degradation seen in most high-k NMOS transistors, achieving 95% of the mobility with a SiON process flow. Ma said UMC achieved a low Vt of 0.25 V by optimizing the HfO2 dielectric, and by capping the TiN metal gate with a LaOx capping layer. The hybrid PMOS after ILD CMP (a), dummy poly removal (b), and low-resist metal CMP (c). (Source: UMC, IEDM 2009) On the PMOS side, the use of a gate-last approach delivers an Ion gain of 30% compared with the gate-first approach. UMC developed a diamond-shaped SiGe stress liner "which gives us an additional performance improvement," Ma said. Also, by doing annealing prior to high-k deposition, UMC avoids oxygen degradation of the high-k and interface layers, which supports high reliability, good TDDB, and relatively low levels of temperature-dependent reliability issues (NBTI and PBTI). "Due to the benefits of the low Vt, less interfacial layer oxide re-growth, and the strain boost from the gate-last approach, the Ion-Ioffperformance of the gate-last PFET achieved a ~30% enhancement," Ma concluded. 聯電28nm製程SRAM試製成功 2008-10-28 15:39:01   聯電公司昨天宣佈，已經成功產出業界首顆全功能28nm製程SRAM芯片。在半導體業界，SRAM往往是試驗新製程工藝的首款產品。而28nm SRAM的試製成功也代表聯電基本擁有了28nm工藝的製造能力。 聯電的28nm SRAM基於該公司自行研發的LL低漏電製程工藝，採用雙重圖形曝光（double patterning）浸潤式微影和應變硅技術來製造。包含6個晶體管的SRAM尺寸為0.122平方微米。 聯電在應用28nm製程工藝時，會針對不同市場需求使用兩種不同的柵極技術。當製造諸如手機芯片等移動設備產品時，他們將採用自家低漏電製程，搭載傳統的硅柵極、氮氧化硅柵極氧化層技術，而當代工注重速度的產品注入GPU、應用處理器時，則會採用High-K金屬柵極技術。 聯電表示，使用公司現有的300mm晶圓工廠，28nm製程可帶來比40nm高近一倍的密度。同時他們還將在28nm平台上為客戶提供定制32nm工藝服務。