2013年5月8日

Intel’s new Atom chips peak on performance, power consumption


Intel’s new Atom chips peak on performance, power consumption


http://www.cnmeonline.com/news/intels-new-atom-chips-peak-on-performance-power-consumption/


by Agam Shah - May 7th, 2013

Intel’s upcoming Atom chips with new CPU architecture will be up to three times faster and five times more power efficient than their predecessors and break the “myth” that ARM processors are more power efficient, Intel said.
Intel expects the new architecture, code-named Silvermont, to be in smartphones, tablets, PCs and servers starting this year. Atom chips code-named Bay Trail will appear in tablets this holiday season. They will support the Android and Microsoft operating systems.
Tablet chips based on Silvermont are two times faster on single-threaded performance than comparable chips based on the current Atom architecture code-named Saltwell, said Belli Kuttanna, an Intel fellow during a briefing Monday that was webcast. Using the same metric, Kuttanna said that Silvermont tablet chips use 4.7 times less power than their predecessors.
Bay Trail chips will also appear in hybrid laptops with detachable and folding screens, and in low-cost desktops priced from $200 to $599. Users can choose between long battery or performance in Silvermont smartphones or tablets, Kuttanna said.
“Silvermont is a complete redefinition of the Atom architecture,” Kuttanna said.
Silvermont CPUs can scale up to eight cores and represent the first major redesign of the Atom architecture since the first netbook chip release in 2008. Atom chips with Silvermont will also include new performance and power management features.
Silvermont comes at a time when the chip maker is trying to find its footing in the smartphone and tablet markets. Intel hopes that Bay Trail will attract a new set of PC buyers and give it a legitimate shot to compete against ARM, which rules the smartphone and tablet markets.
Previous Atom chips were panned for poor performance compared to ARM, whose reputation lies with maximising power efficiency on chips. Intel has maintained that it has already caught up with ARM on power efficiency with the recent Atom chips code-named Medfield, which are used in smartphones.
But during the webcast, Intel Chief Product Officer Dadi Perlmutter said that Atom chips based on Silvermont will offer better performance-per-watt and break the “myth” that ARM processors are more power efficient.
“We see that this kind of solution will be even better,” said Perlmutter, who is also the executive vice president and general manager of the Intel Architecture Group.
Silvermont CPUs incorporate a number of improvements. Out-of-order execution enables more efficient processing of instructions via clock cycles and chips will have more internal bandwidth, with a faster fabric that connects the CPU to other processors such as GPUs. In addition, Silvermont is able to move data faster from the shared cache into DRAM, which enables quicker task execution.
Silvermont also includes the latest virtualisation and security technologies, some of which has been borrowed from previous Intel chip architectures for servers and PCs.
The cores are also flexible on performance and power consumption. CPU cores can be clocked up or shut down if idle. Intel said the flexibility provided by its cores is a better option than ARM’s Big.Little, which incorporates different types of CPU cores to meet power and performance needs. Samsung’s Exynos 5 Octa eight-core processor incorporates a Big.Little design with four high-power cores for demanding tasks and four low-power cores for tasks MP3 playback and voice calls.
With Intel’s chip, no switching would be needed between low-power and high-power cores to meet different performance needs, Kuttanna said. A single Silvermont core can cover different ranges of power and performance, with no algorithms required to switch between cores.
“We can go up and down the range and cover the entire performance range,” Kuttanna said. “You don’t pay the complexity price.”
The new architecture is also able to share power between CPUs, graphics processors and other cores in a chip. Algorithms can also monitor power delivery, thermal and electrical features, and bring power consumption down based on the device type. Tablets and smartphones will also be able to resume from idle mode a lot quicker with new Silvermont features.
Atom chips based on Silvermont will be made using the 22-nanometre process, in which a 3D transistor allows more transistors in a smaller space. The chip will be smaller and more power efficient than the current Atom chips code-named Clover Trail, which are based on the 32-nm process.
Intel is advancing to the 14-nm process later this year, but the company hasn’t said when new smartphone and tablet chips based on the process will be released. Intel Atom’s chips made using 14-nm manufacturing technology are called “Airmont.”


英特爾發表低功耗高效能的 Silvermont 微架構 [2013/05/07 18:13]

http://iservice.libertytimes.com.tw/3c/news.php?no=9368&type=3

英特爾發表名為 Silvermont 的全新低功耗、高效能微架構。

這項技術主要是為了智慧型手機到資料中心等有低功耗需求的市場所設計。 Silvermont 將成為許多創新產品的基礎,而這些產品將於今年稍後問市,其晶片是採用英特爾的先進 22 奈米三閘( Tri-Gate )系統單晶片( SoC )製程,以帶來大幅增進的效能與電源使用效益。
英特爾產品長暨執行副總裁 Dadi Perlmutter 表示:「 Silvermont 不僅是一大進步,也將作為未來嶄新技術的基礎,能滿足各種產品與市場的需求。包括代號為『 Bay Trail 』與『 Avoton 』在內的 22 奈米系統單晶片的初步樣本已獲得客戶的正面好評。未來我們將加快發展此低功耗微架構,每年都會推出新一代技術。」
Silvermont 微架構帶來領先業界的每瓦效能。高度均衡化的設計可支援更廣的動態範圍,並無縫地調升與調降效能以及電源使用效益。在各種標準中, Silvermont 亦提供比目前 Intel Atom (凌動 )處理器核心 1 高達 3 倍的尖峰效能,或者在相同效能水準下,耗電量降低至五分之一。


Silvermont :新一代微架構

英特爾的 Silvermont 微架構運用英特爾的 22 奈米系統單晶片製程進行設計與協同最佳化,並採用革命性的 3-D 三閘電晶體。英特爾藉由這項領先業界的技術帶來大幅的效能提升並增進電源使用效益。


Silvermont 微架構的其他特性還包括:

  • 全新亂序( out-of-order )執行引擎,帶來先進的單執行緒( single-threaded )運算效能。
  • 新的多核心與系統互連架構,最多可擴充至八核心,進一步推升效能以支援高頻寬、低延遲、以及更有效率的亂序處理模式,打造出更均衡化且快速反應的系統。
  • 新的 IA 指令集與技術,帶來進階的效能、虛擬化、以及安全管理功能,藉以支援各類型的產品。這些指令集建立在英特爾現有的 64 位元支援技術以及已安裝的 IA 軟體基礎。
  • 增強的電源管理功能,包括新的智慧遽增技術( intelligent burst technology )、各種低功耗休眠狀態、以及運用英特爾 3-D 電晶體帶來更廣的動態運作範圍。 Intel Burst Technology 2.0 支援單核與多核心晶片,提供更快的反應速度進而增進電源使用效益。
英特爾院士暨首席架構工程師 Belli Kuttanna 表示:「藉由設計與製程技術的協同最佳化,超越我們原先對 Silvermont 設下的各項目標。我們善加運用在微架構研發與尖端製程技術的實力,推出一個最佳技術組合,讓業者大幅提升效能與電源使用效益,同時提供更高的時脈頻率。我們以這項成就為榮,並相信 Silvermont 將為眾多新款低功耗英特爾系統單晶片提供強大且富彈性的基礎。」


針對各領域的運算量身打造

Silvermont 將作為一系列 22 奈米產品的基礎,產品將在今年稍後陸續問市。此新微架構提升了每瓦效能,將使採用這些產品的運算裝置獲得大幅增進的效能與反應速度。
內含英特爾四核心系統單晶片(代號為 Bay Trail )的平板電腦將於 2013 年聖誕假期上市,其運算效能是目前內含英特爾處理器平板電腦 1 的兩倍以上。受益於 Silvermont 架構的彈性,「 Bay Trail 」平台亦將廣泛運用在各個市場,其中包括入門級筆電以及各種創新外型的桌上型電腦。
英特爾的「 Merrifield 」將於今年年底前開始向客戶供貨,它將帶來超越當前世代產品 的效能與電池續航力,並支援情境感知與個人化服務、超高速網路串流傳輸、以及增進對資料、裝置、以及隱私的保護功能。
英特爾的「 Avoton 」將針對資料中心的微型伺服器、儲存、以及橫向擴充作業負載帶來領先業界的電源使用效益與每瓦效能。「 Avoton 」是英特爾第二代 Intel Atom 處理器系統單晶片,提供符合客戶要求的完整伺服器產品功能,其中包括 64 位元運算、整合式互連架構、錯誤校正碼、英特爾虛擬化技術與軟體相容性。「 Rangeley 」則針對網路與通訊基礎架構所設計,尤其是入門級到中階路由器、交換器、以及安全設備。以上兩款產品都將於今年下半年問市。
與此同時,英特爾藉由新一代支援 22 奈米 Haswell 微架構的 Intel Core (酷睿 )處理器帶來許多領先業界的進展,以更低的功耗帶來媲美 PC 的完整效能,支援創新的「 2 合 1 」機種,以及其他將在今年稍後問市的行動裝置。英特爾亦計畫翻新其 Intel Xeon 處理器系列產品,將 22 奈米製程技術應用至資料中心市場,提供更優異的每瓦效能以及其他功能。
Perlmutter 表示:「英特爾將透過 Silvermont 與 Haswell 微架構,為各領域的運算市場帶來更棒的產品與使用經驗。」





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A Prelude to Success

This all started back in 2004, in Austin, Texas. Despite the location, I am talking about Intel and not AMD. In 2004, Intel's Austin Design Center was hard at work on another member of the Pentium 4 processor family - codenamed Tejas.
Tejas was scheduled to arrive after Prescott and continue the NetBurst lineage, but as history would have it, Tejas never saw the light of day. The project was canceled and Intel's corporate attention was instead shifted to taking the Pentium M architecture and improving it to be desktop-worthy.
The Tejas team was, as you'd expect, not particularly pleased with their project being canceled. But, as seems to be the case with Intel's best engineers and canceled projects, they channeled their disappointment into passion and excitement for their next design.
I should stop the story here and point out the striking similarity to another Intel success story, that of the original Centrino. Banias was the first Centrino processor, later named the Pentium M. The team that worked on Banias was the same team that worked on Timna, yet another project cancelled very late in the process. After Timna was cancelled the team, working out of Intel's Israel Design Center, went into a brief collective depression for about a month before receiving instructions to work on Banias. Instead of producing something mediocre, the team felt a need to prove something to those who cancelled their beloved Timna project. The result was Banias, which became the Pentium M, led to the Core Duo and eventually gave us the Core 2 family of processors that we love so dearly today.
Back to Austin. We've got a very small team of people who were hard at work on Tejas and now without anything to do. The same sense of proving their worth brew and in 2004 the team received new orders.
The task was to develop a low power, IA (Intel Architecture, read: x86) core for use in a many-core CPU design. Since this core would be used in a many-core CPU, it would have to be very, very low power (you can't have 10s of cores each consuming 100W).

Many-core CPU designs are in Intel's future, Atom has its roots in the many-core initiative 
I asked the design team in Austin if this was a dirty joke played on them by upper management - going from a very power hungry design like Tejas to something that would consume a couple of watts. Apparently during Tejas' design, a smaller team in Austin was doing some pathfinding work, looking at very low power simple cores. Since they spent about a year doing this pathfinding work, the transition from Tejas to something very low power was natural despite what it may seem from the outside.
Many of the architects that would work on this new, low power core actually came from other microprocessor companies. Belli Kuttanna, the chief architect on the core, worked for Sun on SPARC processors as well as Motorola designing elements of PowerPC cores. Belli worked with others from Sun and Motorola, but now all under the Intel umbrella. One of the members of the validation team working on the core was also a former AMDer.
Early 2004 was the inception of the pathfinding effort to investigate what would be necessary to develop this new low power core. The codename for this core was Bonnell, which as I've mentioned before is the tallest mountain in Austin, measuring only 750 ft. The petite mountain was a perfect fit for this new, small core (engineers aren't the most creative with naming ;)).
The first step in the pathfinding effort was to find out if Bonnell could be based on an existing Intel microarchitecture. The small team looked at reusing the Pentium M or the yet-to-be-released Core 2 and some analysis was done on both of these options. It didn't take long to come to the conclusion that it wasn't possible to hit the power and performance targets using an existing design. As Intel discovered with Centrino, in order to target a new market it would need to use a new microprocessor design.
The team went back to a clean sheet of paper and started with the simplest of microprocessor architectures, a single-issue, in-order core and built up from there. The designers kept iterating until the performance and power targets at that time were met. You have to keep in mind that in 2004, even Intel didn't have a good idea of exactly where this core would be used. Imagine going back to 2004 and being expected to design the microprocessor architecture that could eventually be used in something like a third generation iPhone - it's borderline impossible.
By the end of 2004, Paul Otellini gave the Austin team specific direction that the Bonnell core would be used in a standalone CPU - not as a part of a many-core design effort. This CPU would be used in UMPCs (Ultra Mobile PCs) and an even more unheard of creation called a MID (Mobile Internet Device). The many-core designs are still under development and I suspect that the first one we'll see come to fruition is a little gem called Larrabee.
Bonnell was just a core, but when combined with a L2 cache and an external bus interface it became the CPU known internally as Silverthorne. More recently, Intel gave Silverthorne a proper name and called it the Atom processor.

2013年4月17日

TSMC & SAMSUNG & APPLE



Apple Versus Samsung’s Winner Is TSMC: Riskless Return


TSMC gets $7 in sales for every smartphone sold worldwide, according to Chief Executive Officer Morris Chang, because it’s the only company with the technology to make the chips used in the latest handsets. That ubiquity let Hsinchu, Taiwan-based TSMC post the best risk-adjusted returns among the world’s top 20 chipmakers over the past three years, according to the BLOOMBERG RISKLESS RETURN RANKING. It also beat Apple, Samsung, Nokia Oyj and ZTE, the biggest smartphone makers.
Employees of Taiwan Semiconductor Manufacturing Co. (TSMC) exit the company's headquarters in Hsinchu, Taiwan. TSMC’s annual net income rose 86 percent over the past three years because of surging demand for smartphones and tablets. Photographer: Maurice Tsai/Bloomberg
Attachment: Spreadsheet of Riskless Return Ranking
Morris Chang, chairman and chief executive officer of Taiwan Semiconductor Manufacturing Co. (TSMC), plans to spend $9 billion defending the company’s leading position this year, adding capacity and improving technology. Photographer: Ashley Pon/Bloomberg
A silicon wafer made by Taiwan Semiconductor Manufacturing Co. (TSMC) is arranged for a photograph at the company's headquarters in Hsinchu, Taiwan. The company's shipments of 14 million 8-inch wafers of chips last year was three times UMC’s tally. Photographer: Maurice Tsai/Bloomberg
The logo of Taiwan Semiconductor Manufacturing Co. is displayed at a news conference in Taipei. Photographer: Maurice Tsai/Bloomberg
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Shares of the world’s largest contract maker of chips doubled in Taipei over the period and had the lowest volatility as the company was unaffected by market share swings between smartphone-makers that sold 722 million units last year. TSMC’s size and financial strength means it can maintain a technology lead of at least 12 months over rival outsourcersUnited Microelectronics Corp. (2303) and Globalfoundries Inc.
“As long as smartphones are growing, TSMC wins,” Jeffrey Toder, a Taipei-based Royal Bank of Scotland Plc analyst, said by phone. “TSMC is the single most dominant supplier across all products.” He rates the company hold.
TSMC makes chips designed by clients including Nvidia Corp. (NVDA), Qualcomm Inc. (QCOM), Texas Instruments Inc. andBroadcom Corp. (BRCM) The components it produces include ones that let Apple iPhones and Samsung Galaxy devices control touch-screen displays and communicate with mobile networks.

Tablet Computers

The company’s grip also extends to tablet computers. It gets about $11 from every one sold worldwide, according to Chief Financial Officer Lora Ho. Global smartphone sales will probably rise 22 percent this year, with tablets climbing 41 percent to 172 million units, according to forecasts from Bloomberg Industries and IDC.
TSMC’s Taipei-listed shares returned 4.7 percent when adjusting for volatility in the three years ended Feb. 25. That’s ahead of Cupertino, California-based Apple, which posted an adjusted return of 4.2 percent and Samsung’s 3.7 percent. Qualcomm, the second-best performing dedicated chipmaker, rose 3 percent on an adjusted basis. Intel Corp. (INTC), the world’s biggest chipmaker, had a 0.3 percent return as it missed out on the growth in mobile devices.
Risk-adjusted return is calculated by dividing total return by volatility, or the degree of daily price variation, giving a measure of income per unit of risk. The returns are not annualized. Higher volatility means the price of an asset can swing dramatically in a short period, increasing the potential for unexpected losses.

Low Volatility

While TSMC’s cumulative 105 percent gain in the three years trailed Apple’s 122 percent increase, it topped the ranking because its volatility of 22.1 was the lowest of all suppliers and smartphone makers surveyed. TSMC’s New York-listed ADRs (TSM) also posted lower volatility than Apple’s 28.9 score and Suwon, South Korea-based Samsung’s 30.5.
Its Taiwan shares have advanced at more than six times the pace of the MSCI World Technology Hardware & Equipment Index (MXWO0TH) over the past three years. Still, the shares aren’t trading at a big premium compared to the index: TSMC’s shares have a price- to-earnings ratio of 16.2, compared with 14 for the MSCI World Technology Hardware & Index, according to data compiled by Bloomberg.
Since Apple’s founder Steve Jobs put the iPhone on sale in June 2007, TSMC has had an adjusted return of 2.9 percent. That’s the best performance among pure chipmakers, helped by the lowest volatility among all companies surveyed. Apple had a 6.9 percent adjusted return in the period and Samsung posted 5.2 percent. Hon Hai Precision Industry Co. (2317), the Taipei-based flagship of Foxconn Technology Group which assembles iPhones and iPads, had a negative return of 0.82 percent.

Rising Profits

TSMC’s annual net income rose 86 percent over the past three years because of surging demand for smartphones and tablets. It forecast sales this quarter that surpassed analyst estimates. UMC, the world’s second-largest contract maker of chips, unexpectedly predicted a first-quarter operating loss after failing to keep pace in mobile-phone chips.
“TSMC is now being viewed as a profitable growth company, whereas previously it was seen as just a profitable company,” CFO Ho told Bloomberg News last month.
Its sales are more than four times the size of Hsinchu, Taiwan-based UMC’s. Its net income margin, a measure of how much of its sales a company actually keeps in earnings, is 32.8 percent, higher than 97 percent of 50 global peers by value, according to data compiled by Bloomberg. Its ratio of debt to earnings before interest, taxes, depreciation and amortization, or Ebitda, was 0.37, lower than 82 percent of peers, at the end of last year. The company sold NT$21.4 billion of bonds last month.

Spending Plans

Chang, TSMC’s 81-year-old founder, plans to spend $9 billion defending the company’s leading position this year, adding capacity and improving technology. The investment means the company can make more-powerful chips at smaller sizes. Its shipments of 14 million 8-inch wafers of chips last year was three times UMC’s tally. Globalfoundries is unlisted.
TSMC has grown as clients shun the risk and cost of building their own factories. Neither Qualcomm nor Nvidia, the biggest designers of mobile processors, operate factories. Instead, they contract production to TSMC and UMC. Texas Instruments (TXN), the largest maker of chips that convert sound and video for use in electronics, and Broadcom also outsource production to chip foundries.
“If you’re looking at jostling between Qualcomm and Nvidia, it doesn’t matter because they’re both TSMC customers,” said RBS’s Toder. “If TSMC were shut down tomorrow, there’s not enough capacity in the world to make up for it.”

28 Nanometer

Demand for the latest 28 nanometer production technology spurred it to spend $8.3 billion last year, 38 percent more than originally planned, as the industry struggled to keep pace. One nanometer, equal to a billionth of a meter, measures the size of connections in a chip with smaller metrics being more advanced.
Customers were unable to turn to alternative suppliers because of TSMC’s lead in the technology. Nvidia lost “a lot” of revenue in the second quarter of last year, CEO Huang Jen- hsun said in May. Qualcomm also predicted lower than expected profit as smartphone makers delayed new models because of the lack of chips. The shortage was over by last month, according to Qualcomm CEO Paul Jacob.

Samsung Risk

TSMC could face a risk from Samsung, the world’s biggest maker of smartphones. The Korean company, which already makes most of its own components including displays and memory chips, is boosting production of its own mobile processors. Extending this push into areas where it’s relying on outside designers could take work from TSMC.
“If Samsung uses more in-house components, then other chip designers like Qualcomm won’t be getting orders and TSMC won’t be needed to manufacture them,” said George Chang, who rates TSMC buy at Yuanta Financial Holding Co. in Taipei.
At the same time, TSMC could benefit from an Apple push to pare its reliance on Samsung. Apple uses Samsung-made processors in iPads and iPhones, even though the Korean company sells competing smartphones and tablets.
TSMC could progressively replace Samsung as maker of the A- series processors used in Apple devices, Sanford C. Bernstein analyst Mark Li said in a Jan. 28 report. That could bring in $2.5 billion of revenue over the next three years, he wrote.

Mobile Focus

The Taiwanese company is also less reliant on the slowing PC market than Intel, the biggest maker of chips for desktop computers. PC sales will likely climb 1 percent this year after falling 3.2 percent to 352 million last year, according to International Data Corp. figures compiled by Bloomberg Industries. Sales have slowed on competition from tablets.
“Mobile devices like smartphones and tablets are what’s driving the technology industry now and for the next few years,” said Jitendra Waral, a Hong Kong-based Bloomberg Industries analyst, in an interview. “That is where the supply chain will find its growth.”
TSMC generated 54 percent of sales last quarter from components used in communication devices and 16 percent from computing chips, according to a company presentation. Santa Clara, California-based Intel got 63 percent of sales from PC chips and less than 1 percent from mobile devices.
Intel, which both designs and makes its own chips, is trying to catch up in the mobile space with the Atom series aimed at tablets. The series was later into the market than products from competitors such as Qualcomm, making it difficult to convince mobile device makers to use its offerings.
“TSMC has emerged as a key supplier benefiting from handsets because it allows its customers to offer powerful application processors and communication chips,” said Randy Abrams, who rates the stock outperform at Credit Suisse Group AG in Taipei. “Being independent for all its individual clients and chip designers will help it keep its strong supplier position in the future.”
To contact the reporter on this story: Tim Culpan in Taipei at tculpan1@bloomberg.net
To contact the editors responsible for this story: Michael Tighe at mtighe4@bloomberg.net; Christian Baumgaertel at cbaumgaertel@bloomberg.net

Samsung 14nm finfet 12/2012


Samsung shows no signs of slowing down in 2013 and after confirming plans to expand its chip-making plant in Austin, Texas, the company's also taped out its first 14nm FinFET test chip. The new design (which is being compared with Intel's 'Tri-Gate' found on its Ivy Bridge hardware) promises to offer substantial power and performance improvements compared to existing designs, with low-leakage often mentioned in the same breath as the new silicon. Samsung's new test chip also involved ARM and Synopsis, and is a good sign that we'll be seeing its next-gen chips sooner rather than later.


三星昨(21)日宣布成功試產第1顆導入3D 鰭式場效電晶體(FinFET)的14奈米測試晶片,進度領先台積電,顯示在蘋果「去三星化」趨勢已定下,三星力拚台積電的野心只增不減。
韓聯社報導,三星與安謀 (ARM)、益華(Cadence)、明導(Mentor)與新思(Synopsis)共同合作,成功試產出旗下第1顆採用FinFET技術的14奈米測試晶片。
三星系統晶片部門主管表示,14奈米FinFET製程技術可提升電子裝置效能並降低耗電量,進一步改善行動環境,這也是IBM之後,第2家搭載安謀處理器架構,試產成功的14奈米FinFET測試晶片。
晶圓代工行動裝置晶片商機大,FinFET技術可以解決不斷微縮的奈米晶片的漏電問題。三星原本預計14奈米FinFET於2014年量產,與台積電規劃的16奈米FinFET同步。隨著三星14奈米FinFET試產晶片推出,半導體業者認為,三星FinFET不排除提前半年量產。
台積電面臨三星來勢洶洶的競爭外,格羅方德9月也宣布推出以FinFET導入的14奈米元件,預計2013年底進入客戶試產階段,2014年正式量產;聯電則預計2014年試產。
台積電為了防堵競爭對手,預計使用安謀首款64位元處理器「v8」來測試16奈米FinFET製程,預計明年11月推出首款測試晶片,最快2014年量產。台積電南科14廠將作為第1個量產16奈米FinFET基地,再下一個世代的10奈米FinFET製程,預計於2015年底推出【2012/12/22 經濟日報】 

三星14nm製程技術 Tape Out完成

【CTIMES 陳韋哲 報導】   2012年12月23日 星期日

瀏覽人次:【2664】
   
即使三星電子最近被採用Exynos系列處理器之行動裝置產品疑似存在著安全漏洞問題搞的烏煙瘴氣,但在邁向14奈米製程技術之路一樣沒有任何懈怠。繼格羅方德半導體以及英特爾後,三星也向外界宣布採用14奈米製程技術之行動晶片測試成功,該行動晶片不管是針對動態功耗以及漏電率方面皆有明顯改善。
三星宣布採用14奈米製程技術之行動晶片測試成功
附圖 : 三星宣布採用14奈米製程技術之行動晶片測試成功
三星提到目前14奈米FinFET比起32/28奈米的高介電常數金屬閘極(HKGD)製程,已經大幅改善先前SoC晶片之漏電率以及動態功耗的問題。也代表三星極有可能會在往後推出的行動處理器中採用ARM big.LITTLE處理技術和14奈米製程技術,相信可以預見效能更強大的行動處理器將會縮短問世時間。而三星也協同其他夥伴(Synopsy、ARM、Cadence、Mentor)進行多種晶片測試之Tape Out。
14nm Cortex-A7處理器的順利Tape Out也代表三星在14奈米製程技術的重大突破。三星同時發佈製程技術之產品開發套件,讓其他客戶能夠針對14奈米FinFET測試晶片進行模型設計以及其他產品設計之用。除此之外三星更與ARM共同簽訂有關14奈米製程技術與IP庫的合作協議,並成功研發了14奈米技術的測試處理器晶片。更與其他的合作夥伴一起完成了ARM Cortex-A7處理器、ARM big.LITTLE設置以及SRAM晶片的研發測試工作。
還記得三星於今年年中才斥資19億美元來建立一條新的邏輯晶片生產線,新生產線將採用300mm晶圓、20/14奈米製程技術,加大邏輯晶片的產量,以滿足智慧型手機和平板電腦行動處理器日漸增長的大量需求。以及表示會在近期之內將會開發出內建big.Little省電配置的Exynos處理器,雖然還必須等到2014年才能達到可用的水準,但相信未來行動處理器的效能很快就能跟上PC處理器的腳步。

TSMC working on 16nm finfet April/2013


TSMC Is Working on 16nm FinFET This Year, And On 10nm Chips for 2015

 | April 12, 2013
tsmc-apple-cpu
TSMC plans to outrace Global Foundries and Samsung to 16nm FinFET chips, and they expect to have them in silicon by the end of the year. Don’t get too excited yet, though, as that still means we’re at least another year and a half away on top of that, until we actually see devices with 16nm FinFET chips, and we still have to see the 20nm chips first, at which the next-gen Krait, Cortex A15, and perhaps even Tegra 5 will be made.
Nvidia also promised Tegra 6 will be made at 16nm FinFET (they are TSMC customer), but we won’t see that until 2016. TSMC also has plans for 10nm chips, and utilizing EUV (extreme ultra-violet) litography, but that seems to pose some challenges for now, so they are also researching e-beams in parallel. TSMC founder believers Moore’s Law should last us at least another 7-8 years:
“It looks like we have another 7 to 8 years ahead in advances — maybe more — we can see in technology down to 10 and even 7 nm,” said Morris Chang, founder and chief executive of TSMC, speaking to a small group of press after a keynote here.
“Moore’s Law is going to go on and we will be there — if anyone pursues it, we will pursue it,” he told an audience of several hundred chip designers.
TSMC will have 20 tapeouts for its 20nm process this year (the regular kind, not the experimental 20nm FinFETprocess), and expects mass production for next year. According to them, a Cortex A57 chip at 20nm should be 40% faster than a Cortex A9 at 28nm, and at 16nm FinFET it should be 90% faster, all at the same clock speed.
If their EUV litography is ready for the 10nm process, they will get another 35% performance improvement over the 28nm Cortex A9, at the same power consumption, or a 40% increase in power consumption, at the same performance. What we’ll probably see is a compromise between the two, though.
What this increased competition between the foundries means, is that ARM chips will soon catch-up with Intel, at least on the mobile side. Intel’s Bay Trail Atom will be made at 22nm, and will be released at the end of the year, while next-gen ARM chips will be released at 20nm only a few months later (but the node is also slightly smaller, so a little ahead of Bay Trail). Plus, right now ARM chips like the Cortex A15 have significantly higher performance than Atom already, and the same ARM chips also tend to have much higher GPU performance.
TSMC, Global Foundries, and Samsung should become increasingly more dangerous competition, as their chips get to be made at around the same node and around the same time, and their ARM chips get higher and higher performance that is “good enough” for most people, while costing OEM’s much less than what Intel is charging, and with plenty of chip makers that OEM’s can select.

ARM, TSMC, Cadence produce first 16nm finfet Cortex processor

Richard Wilson
Friday 05 April 2013 00:14
ARm Cortex-A57
ARM and Cadence have announced the first Cortex-A57 processor test chip fabricated on TSMC’s 16nm finfet manufacturing process technology.

According to the companies, this test chip resulted in several optimisations between manufacturing process, design IP, and design tools, which will be critical for production of 16nm chips.

“More than ever, success at the leading edge of innovation requires deep collaboration.  When designing SoCs incorporating advanced processors, like the Cortex-A57, and optimizing the implementation using physical IP created for FinFET processes, the expertise of our partners is needed,” said Tom Cronk, general manager, processor division at ARM.

The 16nm process using finfet technology required new design methodologies. For example, the design flow tackled RC extraction for 3D transistors, complex resistance models for interconnect and vias, quantised cell libraries and double patterning across more layers.

The test chip was implemented using the complete Cadence RTL-to-signoff flow, Cadence Virtuoso custom design platform, ARM Artisan standard cell libraries and TSMC’s memory macros.

“This major milestone was challenging on all fronts, requiring engineers from ARM, Cadence and TSMC to work as a unified team,” said Dr. Chi-Ping Hsu, senior vice president of R&D for the Silicon Realization Group at Cadence.

ARM、台積電攜手16nm FinFET 打造Cortex-A57
‧ 2013/04/02
ARM宣佈將與台積電合作16nm FinFET製程技術,預計用於旗下Cortex-A57處理器產品設計,並且準備應用於包含高階電腦、平板與伺服器等高度運算需求產品。
針對旗下高階Cortex-A57處理器產品設計,ARM宣佈將與台積電合作16nm FinFET製程技術,同時優化64位元ARMv8處理器系列產品。配合ARM Artisan實體IP、台積電記憶體巨集,以及台積電提供開放創新平台 (Open Innovation Platform,OIP)生態環境架構下的電子設計自動化 (Electronic Design Automation,EDA)技術,在半年內即完成從暫存器轉換階層 (RTL)到產品設計定案流程。
未來雙方將合力打造更優異、節能的Cortex-A57處理器,以及相關元件資料庫,並且推出以ARM技術為基礎的高效能系統單晶片 (SoC),並且對應前期客戶在16nm FinFET製程技術上的設計實作。
至於在處理器效能表現方面,根據ARM說法將會是現行處理器規格的3倍以上 (在相同電力損耗下),至於整體電力效能則估計會是5倍左右 (在相同運作時脈下)。
就先前說法,ARM所提出的big.LITTLE技術也經能用於Cortex-A53與Cortex-A57架構處理器,而近期更新旗下Tegra處理器發展藍圖的Nvidia,也預計在2015年後推出代號為「Parker」的Tegra處理器,屆時將採用ARM所提出64位元處理器設計,估計將會採用此項技術打造。


全文網址: ARM、台積電攜手16nm FinFET 打造Cortex-A57 | 通訊報導 | 通訊世界 | udn數位資訊 http://mag.udn.com/mag/digital/storypage.jsp?f_ART_ID=448738#ixzz2Qegtootw
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迎戰三星、英特爾 台積製程飆速

  • 2013-04-15 01:51
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  • 工商時報
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  • 【記者涂志豪/台北報導】
     晶圓代工龍頭台積電本周四(18日)將召開法說會,上周於美國聖荷西(San Jose)舉辦的2013年技術論壇中,卻意外宣示包括16奈米鰭式場效電晶體(FinFET)、極紫外光(EUV)等新技術研發及投產進度全部往前拉。
     業界認為,台積電將新技術投產進度時程全面提前,除了新技術研發有所突破外,另一戰略考量,即是為了迎戰聲勢如日中天的韓國三星,以及即將由薄紗後走到台前的英特爾。
     今年是台積電傾全力拉高28奈米產能的一年,原本規劃明年才開始拉升20奈米產能,但20奈米量產時間點可望提前至今年底開始。台積電在竹科12吋廠Fab12、南科12吋廠Fab14,已有20個20奈米晶片完成設計定案(tape-out),且多數為新一代ARM Cortex A15處理器核心的晶片。業界人士指出,當中自然包括了蘋果下一代A7處理器。
     台積電原本2015年後才真正進入16奈米FinFET世代,但現在已經確定今年底開始試產第一片16奈米FinFET製程晶圓,應是投產首顆64位元ARM Cortex-A57架構及ARMv8指令集設計晶片。
     由此來看,明年台積電就會進入16奈米FinFET世代,比原本預期早了一年。台積電雖然與英特爾、三星等共同加入了微影設備大廠荷商艾司摩爾(ASML)的「客戶聯合投資專案」,但去年底時,仍認為EUV技術尚未成熟,16奈米及10奈米仍會用到多重曝光浸潤式(Multi-Patterning Immersion)微影技術,7奈米後才會進入EUV世代,約在2016~2017年。
     不過,台積電指出,首片採用EUV微影投片的10奈米晶圓,可望在2015年底開始投產出貨。雖然台積電仍在評估電子束微影(e-beam)可行性,但由此來看,台積電EUV製程將提前1~2年時間進入生產階段。
     台積電將20奈米SoC製程、16奈米FinFET製程、EUV微影製程等生產時程全面往前拉,原本預估今年90億美元資本支出顯然不足,外資分析師均認為,台積電今年資本支出拉高到100億美元已無可避免,明年可能還會拉高到100億美元以上,才能將先進製程投產時間點順利提前。